Position: Analog Design Engineer
Location: Reading, Berkshire (Hybrid)
Department: R&D
Employment Type: Full-time
Experience Level: Mid-level
Challenges ignite our passion, and innovation is our mission. At Kandou, we are a team of dedicated professionals making significant strides in the semiconductor industry. As a leading innovator in high-speed and energy-efficient chip-to-chip link solutions, we are committed to shaping the future of electronics. If you're eager to be part of a high-tech scale-up and thrive on pushing boundaries while challenging the status quo, then we have an exciting opportunity for you.
Key Responsibilities
- Participate in the design, modeling, and verification of custom analog designs for high-speed SerDes transceivers in advanced technology nodes.
- Design and verify analog circuits, adhering to prescribed design and documentation flows to meet architecture specifications.
- Engage with customers when necessary to discuss requirements, design specifications, performance results, and product delivery.
- Support analog IP and chip-level integration.
- Collaborate with architects, technical leads, and various teams including analog and digital design, layout, integration, verification, silicon validation, and quality assurance as needed.
Competencies
- Proficiency in designing high-speed analog SerDes circuits, including DFT, DFM, and ESD protection, alongside a solid understanding of transistor and wireline communications fundamentals.
- Familiarity with layout strategies and design techniques applicable to high-speed and high-precision circuits.
- Advanced proficiency with EDA tools for analog circuit design and verification, ideally within the Cadence Virtuoso environment, including simulation, parasitic extraction, electromagnetic modeling, EM/IR analysis, reliability assessment, and LVS/DRC.
- Self-motivated with a strong sense of ownership and responsibility, excellent verbal and written communication skills, and an aptitude for teamwork.
- Able to manage and complete designs on schedule while adhering to defined design process flows and reporting design status to the internal management team.
Requirements
- A Master's or Ph.D. degree in Electronics or a related field.
- Minimum of 5 years of experience in analog design and layout of key circuits in multi-gigabit serial data-link transceivers or RF multi-tone communications, including equalizers, clock generators, clock and data recovery circuits, TISAR ADCs, serializers, and output drivers.
- Expertise in designing and laying out high-speed circuits such as oscillators, phase-locked loops, delay-locked loops, and other fundamental building blocks, including biasing, amplifiers, buffers, regulators, filters, ADCs, and DACs.
- Experience with modern semiconductor process technologies, particularly in FinFET technology nodes.
- Familiarity with using Ocean, MDL, or equivalent tools to automate analog design verification is highly desirable.
If you believe this role aligns with your career aspirations and you're excited about joining a dynamic company poised for growth, we would love to hear from you. Apply online using the form below. Please note that only applications matching the job profile will be considered.
Together, We Kandou It!
Visit us at www.kandou.ai and our LinkedIn page.